Embodiments relate to electronic devices. Some embodiments relate to a semiconductor device manufacturing technology, including a method of forming silicide of a semiconductor device.
A semiconductor device may be relatively highly integrated. Therefore, a semiconductor design rule may trend toward miniaturization and operation speed of a device may become faster. Although a gate electrode of a transistor may become relatively small, a sheet resistance and/or a contact resistance may be problematic. To address these drawbacks, a technique to form a metal silicide may be developed. A metal silicide may have a relatively high melting point and/or a relatively low resistivity, and may be formed over a gate electrode of a polycrystalline silicon film and/or over a substrate including a source/drain. Resistance of a gate electrode and/or contact resistance of a source/drain may be relatively reduced.
A process of forming silicide over a gate electrode and/or a process of forming silicide over a source/drain may be separately performed. However, a salicide (self aligned silicide) process of forming silicide over a gate electrode and/or a source/drain in one process may be advantageous to address process simplification and/or cost reduction. In a salicide process, a relatively high melting point metal may be laminated between a silicon layer and an insulating layer. If the laminated layers are heated, a portion of a relatively high melting point metal over a silicon layer may react to form a salicide. A portion of a relatively high melting point metal over an insulating layer may remain without substantial change. A relatively high melting point metal that remains without change may be selectively etched to form a salicide layer.
When a transistor drives a large resistance may be generated, for example at an interface between metal wiring and a silicon substrate. Therefore, a metal (e.g., Co, Ti, Pt, W and the like) silicon compound may be used to form an Ohmic Contact between metal and silicon, and a source/drain implant of high concentration may be performed to form salicide.
Further steps to form a silicide may be included in a silicide forming process, preferably in a relatively easy manner which may improve a quality thereof. For example, an amorphization implant may be performed to obtain correct junction depth by suppressing ion channeling occurring in a same area before performing a silicide process other than the source/drain implant.
Therefore, there is a need for semiconductor device manufacturing technologies, including a method of forming silicide of a semiconductor device and/or to perform a source/drain implant process and an amophization implant process simultaneously. There is a need to simplify a process by simultaneously performing a source/drain implant and an amorphization implant when a silicide is formed over a silicon substrate.